Research: Accelerating GNSS software receivers

By Carles Fernandez–Prades, Javier Arribas and Pau Closas, Centre Tecnologic de Telecomunicacions de Catalunya, Spain. Presented at ION GNSS+, September 2016.

This paper addresses both the efficiency and the portability of a computer program in charge of the baseband signal processing of a GNSS receiver. Efficiency, in this context, refers to optimizing the speed and memory requirements of the software receiver. Specifically, the interest is focused on how fast the software receiver can process the incoming stream of raw signal samples and, in particular, if signal processing up to the position fix can be executed in real-time (and how many channels the host computer executing the receiver application can sustain in parallel).

Diagram of Typical Code and carrier tracking loops in a GNSS receiver. Colored dotted-line boxes show functions implemented in SIMD technology. Lanes “16ic” are data streams whose items are complex numbers with real and imaginary components represented with 16-bit integers, whereas “32fc” indicates those with complex numbers with real and imaginary components in 32-bit floating point representation.

This is achieved by applying the concept of parallelization at different abstraction levels. The paper describes strategies based on task, data and instruction-level parallelism, as well as actual implementations released under an open source license and the results obtained with different commercially available computing platforms. At the same time, the proposed solution also addresses portability, understood as the usability of the same software in different computing environments.